This invention relates generally to semiconductors and more particularly to methods for making semiconductor devices.
As is known in the art, semiconductor devices are used in a wide variety of applications. One such device is a metal oxide semiconductor field effect transistor (MOSFET). Such device includes a gate electrode for controlling the flow of carriers between source and drain regions formed in a semiconductor, typically silicon, body. The gate electrode typically is formed on a thin thermally grown silicon dioxide layer over a gate region of the semiconductor body which is disposed between the source and drain regions. A layer of doped polycrystalline silicon is formed on the gate oxide. A layer of metal, such as tungsten silicide, is formed over the doped polycrystalline silicon to provide, with the doped polycrystalline silicon, a gate electrode for the MOSFET. After this gate electrode is formed, dopant is implanted into the silicon body to provide the source and drain regions. This gate electrode is covered with an insulator, or dielectric, of silicon nitride. More particularly, after forming the source and drain regions, a series of process steps are performed with the result that a layer of silicon nitride is formed on top of the tungsten silicide (i.e., a silicon nitride cap for the gate electrode), silicon nitride spacers are formed over the sides of the gate electrode, and a layer of silicon oxynitride is formed on the silicon body over the doped source and drain regions and over the silicon nitride sidewall spacers and cap.
The resulting structure is shown in FIG. 1. More particularly, the silicon substrate 10 has a thermally grown silicon dioxide layer 12. The gate electrode 13 includes a doped polycrystalline silicon layer 14 on the layer 12 and a tungsten silicide layer 16 on the doped polycrystalline silicon layer 14 to form a gate electrode 13. Thus, the gate region 18 under gate electrode 13 is between the source and drain regions S, D. It is noted that a silicon nitride cap 20a and sidewall spacers 20b are over gate electrode 13, and a silicon oxynitride layer 20c is over the source and drain regions, S, D and over the silicon nitride cap 20a and sidewall spacers 20b, as shown.
Next, a dielectric layer 22 of, here for example, phosphor doped silicate glass (BSPG) is deposited over the structure and chemical mechanically polished back to the top of the dielectric layer 20c on the gate electrode 13, as shown in FIG. 1. An oxide layer 24, here TEOS, is deposited over the structure. Next an antireflection coating (ARC) 26 is deposited over the TEOS layer 24. The ARC 26 is an organic material, e.g. a polymer used to absorb ultra violet light. A photoresist layer 28 is then deposited over the ARC 26. A mask, not shown, is placed over the photoresist layer 28, and exposed to the ultra violet light. The photoresist layer 28 is developed to provide the mask shown in FIG. 1. Next, the structure is exposed to an etch to open the exposed portions of the ARC layer 26, here the etch is a reactive ion etch (RIE) using a N.sub.2 and O.sub.2 chemistry. Next, the exposed portions of the TEOS layer 24 is RIE with C.sub.4 F.sub.8 and CO and argon and oxygen chemistry. Next, the exposed portions of the BSPG dielectric layer 22 is etched using an RIE with a C.sub.4 F.sub.8 and CO and argon chemistry. This RIE stops when in contact with the silicon oxynitride layer 20c. Next, the exposed portions of the silicon oxynitride layer 20c are RIE using CF.sub.4 and CHF.sub.3 chemistry to thus expose portions of the source and drain regions S, D for source and drain electrical contacts, not shown.
As is known, one etch typically used is a reactive ion etch (RIE) having a fluoride base (e.g., C.sub.4 F.sub.8). However, such etch chemistry is strongly dependent and influenced by the material used for the photoresist layer.
As is also known in the art, one technique suggested has been to use a layer of polycrystalline silicon over the TEOS layer prior to the deposition of the ARC layer. However, because the polycrystalline silicon is conductive it must be removed.